The present invention relates to the monitoring of error conditions in an integrated circuit. The invention is particularly but not exclusively concerned with monitoring errors arising in the transmission of packets routed between functional modules via an on-chip communication path.
Integrated circuits are becoming increasingly highly embedded. It is now possible to integrate on a single chip a number of functional modules including for example a high performance CPU with a plurality of additional complex modules, linked together using a high performance bus. In the past, such complex systems were constructed from discrete components on a printed circuit board. It was possible to track errors by physically attaching probes from a logic analyser to the bus on the printed circuit board and observing the behaviour. For highly integrated systems on a single chip, physical access to the bus is impractical. For debugging purposes, it is highly advantageous to be able to monitor certain error conditions concerning transmission of packets on the bus without interfering with the transmission of those packets and without the need for running complex debugging software.
According to one aspect of the invention there is provided an integrated circuit comprising: a plurality of functional modules interconnected via an on-chip communication path, each functional module having packet handling circuitry for generating and receiving packets conveyed by the communication path, wherein each functional module is associated with an error monitoring register for monitoring error conditions and wherein the packet handling circuitry includes error detection logic for detecting an error condition and flagging the error condition in the error monitoring register.
Another aspect of the invention provides a functional module having an interface for connection to a packet router, the functional module having packet handling circuitry for generating and receiving packets conveyed by the packet router across said interface, wherein the packet handling circuitry includes error detection logic for detecting an error condition in packets conveyed by the packet router and setting one or more of a set of communication error flags in an error monitoring register implemented at the functional module.
A still further aspect of the invention provides a method of monitoring errors arising in the transmission of packets conveyed by a packet router interconnecting a plurality of functional modules wherein each functional module has packet handling circuitry for generating and receiving packets, the method comprising: at each functional module, monitoring the receipt of packets conveyed by the packet router to that functional module, determining the nature of the received packet amongst the group of packet types including a memory access request packet, an ordinary response packet and an error response packet, in the case of receipt of a memory access request packet, checking whether the memory access request packet conveys a valid request for that functional module and, if so, generating an ordinary response packet and, if not, generating an error response packet, and in the case of generation of an error response packet, setting a communication error flag at the functional module to denote that an error response packet has been generated.
Another aspect of the present invention provides a method of monitoring errors arising in the transmission of packets conveyed by a packet router interconnecting a plurality of functional modules wherein each functional module has packet handling circuitry for generating and receiving packets, the method comprising: at each functional module, monitoring the receipt of packets conveyed by the packet router to that functional module, determining the nature of the received packet amongst the group of packet types including a memory access request packet, an ordinary response packet and an error response packet, in the case of receipt of an error response packet, setting a communication error flag at the functional module to denote that an error response packet has been received.
Another aspect of the present invention provides a method of monitoring errors arising in the transmission of packets conveyed by a packet router interconnecting a plurality of functional modules wherein each functional module has packet handling circuitry for generating and receiving packets, the method comprising: at each functional module, monitoring the receipt of packets conveyed by the packet router to that functional module. Determining the nature of the received packet amongst the group of packet types including a memory access request packet, an ordinary response packet and an error response packet, in the case of receipt of a memory access request packet, identifying at least one of the destination and function of the memory access request packet and setting a communication error flag at the functional module if the destination or the function of the memory access request packet is in error.
Thus, according to the main concept underlying the above aspects of the invention, each functional module responds to an error condition by setting an error flag. Additionally it is possible for the functional module to generate an error response packet to indicate to the source module of a requesting packet that a request has been made in error. In the described embodiment, a register at each functional module records the transmission and reception of error response packets, and also allows a number of additional error conditions to be flagged.
Furthermore, in the described embodiment, the registers are memory mapped to enable debuggers to observe the identify of all modules which participate in the transmission or receipt of error response packets. Thus, it is possible to carry out a memory scan of the on-chip memory space to locate flagged error conditions.
The packets conveyed via the communication path or packet router can include memory access request packets and response packets. The packet handling circuitry can be operable to generate ordinary response packets in the case that a valid memory access request has been received, and error response packets in the case that an invalid memory access request has been received.
The error condition flags can be read or written by such memory access request packets, which can be-generated on or off-chip. One of the functional modules can be arranged to provide an off-chip communication link connectable to a host computer particularly for debugging purposes.
The integrated circuit can be supplied with a common memory space of which the error monitoring registers form part. The memory space can include a plurality of control blocks associated respectively with the functional modules, each control block comprising a plurality of control registers including the error monitoring register for each functional module.
A number of different communication error flags can be provided.
An error response received communication error flag can be set when an error response packet has been received.
An error response sent communication error flag can be set when an error response packet has been generated.
Other communication error flags can be used to monitor errors received in the request packets themselves. For example, if the destination or function defined in a memory access request packet is in error with respect to that functional module, particular communication error flags can be set.
An unsolicited response communication error flag can be set in the case that an unsolicited response packet has been received at a particular functional module.